Area-Optimized Implementation of Quadrature Direct Digital Frequency Synthesizers on LUT-based FPGAs

Year	2003
Authors	Javier Valls Coquillat
Co-authors	F. Cardells, J. Valls
Journal	IEEE Transactions on Circuits and Systems II
Volume	50
Number	30
Pages	135-138
Dates	Marzo
DOI	http://dx.doi.org/10.1109/TCSII.2003.809716
Research Groups	Digital Systems Integration Group (GISED)

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