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Publication

Fully-parallel LUT-based (2048,1723) LDPC Code Decoder for FPGA

Year

2012

Authors

  Javier Valls Coquillat

Co-authors

V. Torres, A. Perez-Pascual, T. Sansaloni, J. Valls

Place

Sevilla, España

Dates

9/12/2012 al 12/12/2012

URL

  www.ieee-icecs2012.org

DOI

  http://dx.doi.org/10.1109/ICECS.2012.6463663

Research Groups

Digital Systems Integration Group (GISED)